Q) Introduce your paper briefly.
A) This paper explores how to obtain reliable multi-level metal interconnections in organic integrated circuits (ICs). Unlike the conventional approach of locally removing the insulator for via-hole formation of metal interconnections in integrated circuits (ICs), this work proposes a new interconnection method based on a selectively patterned dielectric insulator. As shown in the diagram below, one metal layer can be isolated from another in the active region where the dielectric is present or interconnected to another in the open area where the dielectric is not present.
Since this method makes metal interconnections without forming via-holes, we call this method “via-hole-less metal interconnect”. Using the proposed via-hole-less interconnect method, we demonstrated three-dimensional organic integrated circuits consisting of 5 transistors. As shown in the fabrication process schematic below, we implemented the organic circuits without the via-hole formation process.
Q2) It sounds like you tried to think outside the box. What significance do you want to emphasize most in this finding?
A2) While much effort has been globally made to implement ICs using organic semiconductors, a reliable metal interconnection method is still lacking. The very high sensitivity of organic materials to the chemical solvents, heat, and photo/e-beam radiation used in conventional interconnection methods, results in one of the biggest challenges for organic ICs—a reliable metal interconnection method. While alternatives like laser drilling or solvent-based inkjet printing have been developed, the inherent sequential nature of the one-by-one removal process makes them very time consuming and not particularly suitable for ICs with complex multi-metal interconnections. Our proposed via-hole-less interconnect method using a selectively patterned dielectric overcomes these limitations to provide reliable metal Interconnects for organic IC technology.
Q3) Okay. Minimizing damage to organic materials in your via-hole-less scheme is believed to enable a more reliable metal interconnect process than conventional methods. What is next?
A3) Moving beyond the 3D-integrated NAND and NOR circuits presented in this study, we are designing and implementing more complex ICs that emphasize the technological significance of multi-metal interconnects which are enabled by our via-hole-less interconnect scheme. We are very excited to see how much more complexed ICs the via-hole-less interconnect scheme can enable.
Q4) The author list of your paper seems to be the result of collaborative research between two research institutes. How did the research start?
A4) Yes, this study is the collaborative research between Pohang University of Science and Technology (POSTECH) and Korea Advanced Institute of Science and Technology (KAIST), Korea. Our collaboration started at the 2016 MRS Fall Meeting in Boston, MA. Dr. Hyejeong Seong from KAIST and I (Hocheon Yoo) from POSTECH happened to stay in the same hostel and we had a chance to talk each other. Since Dr. Seong’s research was on initiated chemical vapor deposition (iCVD)-based dielectric materials and my Ph.D. objective was to implement ICs using organic semiconductors, we discussed the possibility of selectively depositing iCVD-based dielectric patterns for organic ICs. Following this conversation, the two research teams initiated a formal collaboration for the via-hole-less metal interconnect method and its application to organic ICs. After Dr. Seong’s research career took her to Imperial College London, Hongkeun Park and I continued the project under the supervision of Prof. Sung Gap Im and Prof. Jae-Joon Kim.
Q5) Interesting. It seems that not only the metal interconnects but also the close interaction between the two research teams resulted in the great achievement. What is your personal meaning in this study?
A5) I would like to talk about two things. First, I got a great research partner, Hongkeun thanks to this project. Hongkeun and I have had a lot of interactions over the last three years with this project, and we addressed and proceeded one by one whenever new difficulties arose.
Second, I am very pleased to have accomplished the organic ICs implementation that Prof. Kim and I have aimed since I joined his research group. We have always talked about how to implement ICs using organic semiconductors. At first, we did not have a technology to fabricate even the unit transistor properly. Slowly but steadily, we have accomplished technology development step by step in our lab as following:
May 15, 2014: First p-type transistor succeeded (using P3HT)
April 10, 2015: First inverter circuit succeeded (using ambipolar semiconductor)
January 14, 2016: First NAND/NOR succeeded (using split-gate transistors)
March 19, 2017: First iCVD-based inverter, NAND, NOR, and X-OR succeeded
May 9, 2018: First multi-metal-interconnected transistors and inverters succeeded
Therefore, I am very proud of our recent achievement of the multi-metal interconnection based organic circuits. Also, I am grateful to Prof. Kim for encouraging and supporting my PhD research on implementing circuits using organic semiconductors, which resulted in such great achievements.
Q6) Late, but introduce yourself?
A6) I received my Ph.D. from POSTECH in 2018. I continued my research career as a postdoc in Prof. Kim’s group and am currently a visiting postdoc researcher working on neuromorphic devices and circuits in Prof. Mark Hersam’s group at Northwestern University, USA. I enjoy developing new fabrication method for functional circuits from emerging materials such as organics, transition metal dichalcogenides (TMDs), carbon nanotubes (CNTs), and oxides. Long term, I would like to contribute to R & D in the semiconductor technology.